Synopsys Synplify 2019 for PC Windows

Description

This software is the industry standard for producing high-performance and cost-effective FPGA designs. It supports the latest VHDL and Verilog language constructs including SystemVerilog and VHDL-2008.

It uses a single, easy-to-use interface and has the ability to perform incremental synthesis and intuitive HDL code analysis. It has block-based and bottom-up flows for consistent results from one run to the next.

Features of Synopsys Synplify 2019

• Incremental, block-based and bottom-up flows for consistent results from one run to the next
• Automatic compile points incremental flow for up to 4x faster runtime while maintaining QoR
• Accelerated runtimes with support for up to 4 processors
• Scripting and Tcl/Find support for flow automation and customizable synthesis, debug and reporting
• Optimal area and timing results using FPGAs from Achronix, Altera, Lattice, Microsemi, Xilinx
• Hierarchical team design flow allowing parallel and/or geographically distributed design development
• Comprehensive language support including Verilog, VHDL, SystemVerilog, VHDL-2008 and mixed-language design
• FSM Compiler and FSM Explorer for automatic extraction and optimization of finite state machines from RTL
• Graphical state machine viewer to automatically create bubble diagrams for debugging and documenting FSMs

Technical Details and System Requirements

• Supported OS: Windows 10 / Windows 8.1 /Windows 7
• Processor: Multi core Intel Series or above, Xeon or AMD equivalent
• RAM: 4GB (8GB or more recommended)
• Free Hard Disk Space: 4GB or more recommended